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? 1998-2012 microchip technology inc. ds20067k-page 1 93aa46/56/66 features: single supply with programming operation down to 1.8v low-power cmos technology: -70 ? a typical active read current at 1.8v -2 ? a typical standby current at 1.8v org pin selectable memory configuration: - 128 x 8- or 64 x 16-bit organization (93aa46) - 256 x 8- or 128 x 16-bit organization (93aa56) - 512 x 8 or 256 x 16-bit organization (93aa66) self-timed erase and write cycles (including auto-erase) automatic eral before wral power on/off data protection circuitry industry standard 3-wire serial i/o device status signal during erase/write cycles sequential read function 1,000,000 e/w cycles ensured data retention > 200 years 8-pin pdip/soic (soic in jedec and eiaj standards) temperature ranges supported: description: the microchip technology inc. 93aa46/56/66 are 1k, 2k and 4k low voltage serial electrically erasable proms. the device memory is configured as x8 or x16 bits depending on the org pin setup. advanced cmos technology makes these devices ideal for low power nonvolatile memory applications. the 93aa series is available in standard 8-pin pdip and surface mount soic packages. the rotated pin-out 93aa46x/ 56x/66x are offered in the sn package only. package types block diagram - commercial (c): 0c to +70c - industrial (i): -40c to +85c 12 3 4 87 6 5 cs clk di do ss vnu org v cc 12 3 4 87 6 5 ss vnu org v cc cs clk di do 12 3 4 87 6 5 orgvss do di nu vcc cs clk pdip soic soic 93aa46 93aa56 93aa66 93aa46 93aa56 93aa66 93aa46x 93aa56x 93aa66x memory array address decoder address counter output buffer data register mode decode logic clock generator v cc v ss do di org cs clk 1k/2k/4k 1.8v microwire serial eeprom not recommended for new designs ? please use 93aa46c, 93aa56c or 93aa66c. downloaded from: http:///
93aa46/56/66 ds20067k-page 2 ? 1998-2012 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings (?) v cc .............................................................................................................................................................................7.0v all inputs and outputs w.r.t. v ss ......................................................................................................... -0.6v to v cc +1.0v storage temperature ............................................................................................................ ...................-65c to +150c ambient temperature with power applied ......................................................................................... .......-40c to +125c soldering temperature of leads (10 seconds) .................................................................................... ...................+300c esd protection on all pins ..................................................................................................... .....................................4 kv ? notice: stresses above those listed under absolute maximum ratings may cause permanent damage to th e device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 3 93aa46/56/66 table 1-1: dc and ac electrical characteristics v cc = +1.8v to +5.5v commercial (c): t a = 0c to +70c industrial (i): t a = -40c to +85c parameter symbol min typ max units conditions high-level input voltage v ih 12 . 0 v cc +1 v v cc ? 2.7v v ih 20 . 7 v cc v cc +1 v v cc < 2.7v low-level input voltage v il 1 -0.3 0.8 v v cc ? 2.7v v il 2 -0.3 0.2 v cc vv cc < 2.7v low-level output voltage v ol 1 0 . 4 vi ol = 2.1 ma; v cc = 4.5v v ol 2 0 . 2 vi ol = 100 ? a; v cc = 1.8v high-level output voltage v oh 12 . 4 vi oh = -400 ? a; v cc = 4.5v v oh 2v cc -0.2 v i oh = -100 ? a; v cc = 1.8v input leakage current i li -10 10 ? av in = 0.1v to v cc output leakage current i lo -10 10 ? av out = 0.1v to v cc pin capacitance (all inputs/outputs) c in , c out 7 p fv in /v out = 0v (note 1 & 2) t a = +25c, f clk = 1 mhz operating current i cc write 3 ma f clk = 2 mhz; v cc =5.5v (note 2) i cc read 70 1 500 ma ? a ? a f clk = 2 mhz; v cc = 5.5v f clk = 1 mhz; v cc = 3.0v f clk = 1 mhz; v cc = 1.8v standby current i ccs 2 100 30 ? a ? a ? a clk = cs = 0v; v cc = 5.5v clk = cs = 0v; v cc = 3.0v clk = cs = 0v; v cc = 1.8v org, di = v ss or v cc clock frequency f clk 21 mhzmhz v cc ? 4.5v v cc < 4.5v clock high time t ckh 250 ns clock low time t ckl 250 ns chip select setup time t css 50 ns relative to clk chip select hold time t csh 0 ns relative to clk chip select low time t csl 250 ns data input setup time t dis 100 ns relative to clk data input hold time t dih 100 ns relative to clk data output delay time t pd 400 ns cl = 100 pf data output disable time t cz 100 ns cl = 100 pf (note 2) status valid time t sv 500 ns cl = 100 pf program cycle time t wc 41 0m s erase/write mode t ec 81 5m s eral mode (vcc = 5v ? 10%) t wl 16 30 ms wral mode (vcc = 5v ? 10%) endurance ? 1m ? 1m ? 25c, vcc = 5.0v, block mode (note 3) note 1: this parameter is tested at t a = 25 ? c and f clk = 1 mhz. 2: this parameter is periodically sampled and not 100% tested. 3: this parameter is not tested but ensured by characterization. for endu rance estimates in a specific application, please consult the total endurance? model which can be obtained from microchips web site. downloaded from: http:///
93aa46/56/66 ds20067k-page 4 ? 1998-2012 microchip technology inc. table 1-2: instruction set for 93aa46: org = 1 (x 16 organization) table 1-3: instruction set for 93aa46: org = 0 (x 8 organization) table 1-4: instruction set for 93aa56: org = 1 (x 16 organization) table 1-5: instruction set for 93aa56: org = 0 (x 8 organization) instruction sb opcode address data in data out req. clk cycles read 1 10 a5 a4 a3 a2 a1 a0 d15 - d0 25 ewen 1 00 1 1 x x x x high-z 9 erase 1 11 a5 a4 a3 a2 a1 a0 (rdy/bsy )9 eral 1 00 1 0 x x x x (rdy/bsy )9 write 1 01 a5 a4 a3 a2 a1 a0 d15 - d0 (rdy/bsy )2 5 wral 1 00 0 1 x x x x d15 - d0 (rdy/bsy )2 5 ewds 1 00 0 0 x x x x high-z 9 instruction sb opcode address data in data out req. clk cycles read 1 10 a6 a5 a4 a3 a2 a1 a0 d7 - d0 18 ewen 1 00 1 1 x x x x x high-z 10 erase 1 11 a6 a5 a4 a3 a2 a1 a0 (rdy/bsy )1 0 eral 1 00 1 0 x x x x x (rdy/bsy )1 0 write 1 01 a6 a5 a4 a3 a2 a1 a0 d7 - d0 (rdy/bsy )1 8 wral 1 00 0 1 x x x x x d7 - d0 (rdy/bsy )1 8 ewds 1 00 0 0 x x x x x high-z 10 instruction sb opcode address data in data out req. clk cycles read 1 10 x a6 a5 a4 a3 a2 a1 a0 d15 - d0 27 ewen 1 00 1 1 x x x x x x high-z 11 erase 1 11 x a6 a5 a4 a3 a2 a1 a0 (rdy/bsy )1 1 eral 1 00 1 0 x x x x x x (rdy/bsy )1 1 write 1 01 x a6 a5 a4 a3 a2 a1 a0 d15 - d0 (rdy/bsy )2 7 wral 1 00 0 1 x x x x x x d15 - d0 (rdy/bsy )2 7 ewds 1 00 0 0 x x x x x x high-z 11 instruction sb opcode address data in data out req. clk cycles read 1 10 x a7 a6 a5 a4 a3 a2 a1 a0 d7 - d0 20 ewen 1 00 1 1 x x x x x x x high-z 12 erase 1 11 x a7 a6 a5 a4 a3 a2 a1 a0 (rdy/bsy )1 2 eral 1 00 1 0 x x x x x x x (rdy/bsy )1 2 write 1 01 x a7 a6 a5 a4 a3 a2 a1 a0 d7 - d0 (rdy/bsy )2 0 wral 1 00 0 1 x x x x x x x d7 - d0 (rdy/bsy )2 0 ewds 1 00 0 0 x x x x x x x high-z 12 downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 5 93aa46/56/66 table 1-6: instruction set for 93aa66: org = 1 (x 16 organization) table 1-7: instruction set for 93aa66: org = 0 (x 8 organization) instruction sb opcode address data in data out req. clk cycles read 1 10 a7 a6 a5 a4 a3 a2 a1 a0 d15 - d0 27 ewen 1 00 1 1 x x x x x x high-z 11 erase 1 11 a7 a6 a5 a4 a3 a2 a1 a0 (rdy/bsy )1 1 eral 1 00 1 0 x x x x x x (rdy/bsy )1 1 write 1 01 a7 a6 a5 a4 a3 a2 a1 a0 d15 - d0 (rdy/bsy )2 7 wral 1 00 0 1 x x x x x x d15 - d0 (rdy/bsy )2 7 ewds 1 00 0 0 x x x x x x high-z 11 instruction sb opcode address data in data out req. clk cycles read 1 10 a8 a7 a6 a5 a4 a3 a2 a1 a0 d7 - d0 20 ewen 1 00 1 1 x x x x x x x high-z 12 erase 1 11 a8 a7 a6 a5 a4 a3 a2 a1 a0 (rdy/bsy )1 2 eral 1 00 1 0 x x x x x x x (rdy/bsy )1 2 write 1 01 a8 a7 a6 a5 a4 a3 a2 a1 a0 d7 - d0 (rdy/bsy )2 0 wral 1 00 0 1 x x x x x x x d7 - d0 (rdy/bsy )2 0 ewds 1 00 0 0 x x x x x x x high-z 12 downloaded from: http:///
93aa46/56/66 ds20067k-page 6 ? 1998-2012 microchip technology inc. 2.0 functional description when the org pin is connected to v cc , the (x16) organization is selected. when it is connected to ground, the (x8) organization is selected. instructions, addresses and write data are clocked into the di pin on the rising edge of the clock (clk). the do pin is nor- mally held in a high-z state except when reading data from the device, or when checking the ready/busy status during a programming operation. the ready/ busy status can be verified during an erase/write operation by polling the do pin; do low indicates that programming is still in progress, while do high indicates the device is ready. the do will enter the high-z state on the falling edge of the cs. 2.1 start condition the start bit is detected by the device if cs and di are both high with respect to the positive edge of clk for the first time. before a start condition is detected, cs, clk and di may change in any combination (except to that of a start condition), without resulting in any device opera- tion (read, write, erase, ewen, ewds, eral, and wral). as soon as cs is high, the device is no longer in the standby mode. an instruction following a start condition will only be executed if the required amount of opcode, address and data bits for any particular instruction is clocked in. after execution of an instruction (i.e., clock in or out of the last required address or data bit) clk and di become don't care bits until a new start condition is detected. 2.2 di/do it is possible to connect the data in and data out pins together. however, with this configuration it is possible for a bus conflict to occur during the dummy zero that precedes the read operation, if a0 is a logic high level. under such a condition the voltage level seen at data out is undefined and will depend upon the relative impedances of data out and the signal source driving a0. the higher the current sourcing capability of a0, the higher the voltage at the data out pin. 2.3 data protection during power-up, all programming modes of operation are inhibited until v cc has reached a level greater than 1.4v. during power-down, the source data protection circuitry acts to inhibit all programming modes when v cc has fallen below 1.4v at nominal conditions. the ewen and ewds commands give additional protection against accidentally programming during normal operation. after power-up, the device is automatically in the ewds mode. therefore, an ewen instruction must be performed before any erase or write instruction can be executed. 2.4 read the read instruction outputs the serial data of the addressed memory location on the do pin. a dummy zero bit precedes the 16-bit (x16 organization) or 8 bit (x8 organization) output string. the output data bits will toggle on the rising edge of the clk and are stable after the specified time delay (t pd ). sequential read is possible when cs is held high. the memory data will automatically cycle to the next register and output sequentially. 2.5 erase/write enable and disable ( ewen, ewds ) the 93aa46/56/66 power up in the erase/write disable (ewds) state. all programming modes must be preceded by an erase/write enable ( ewen ) instruction. once the ewen instruction is executed, programming remains enabled until an ewds instruction is executed or v cc is removed from the device. to protect against accidental data disturb, the ewds instruction can be used to disable all erase/write functions and should follow all programming operations. execution of a read instruction is independent of both the ewen and ewds instructions. 2.6 erase the erase instruction forces all data bits of the specified address to the logical 1 state. cs is brought low following the loading of the last address bit. this falling edge of the cs pin initiates the self-timed programming cycle. the do pin indicates the ready/busy status of the device if cs is brought high after a minimum of 250 ns low (t csl ). do at logical 0 indicates that program- ming is still in progress. do at logical 1 indicates that the register at the specified address has been erased and the device is ready for another instruction. the erase cycle takes 4 ms per word typical. downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 7 93aa46/56/66 2.7 write the write instruction is followed by 16 bits (or by 8 bits) of data which are written into the specified address. after the last data bit is put on the di pin, cs must be brought low before the next rising edge of the clk clock. this falling edge of cs initiates the self-timed auto-erase and programming cycle. the do pin indicates the ready/busy status of the device if cs is brought high after a minimum of 250 ns low (t csl ) and before the entire write cycle is complete. do at logical 0 indicates that programming is still in progress. do at logical 1 indicates that the register at the specified address has been written with the data specified and the device is ready for another instruction. the write cycle takes 4 ms per word typical. 2.8 erase all ( eral ) the eral instruction will erase the entire memory array to the logical 1 state. the eral cycle is identical to the erase cycle except for the different opcode. the eral cycle is completely self-timed and commences at the falling edge of the cs. clocking of the clk pin is not necessary after the device has entered the self clocking mode. the eral instruction is ensured at 5v ? 10%. the do pin indicates the ready/busy status of the device if cs is brought high after a minimum of 250 ns low (t csl ) and before the entire write cycle is complete. the eral cycle takes (8 ms typical). 2.9 write all ( wral ) the wral instruction will write the entire memory array with the data specified in the command. the wral cycle is completely self-timed and commences at the falling edge of the cs. clocking of the clk pin is not necessary after the device has entered the self clock- ing mode. the wral command does include an auto- matic eral cycle for the device. therefore, the wral instruction does not require an eral instruction but the chip must be in the ewen status. the wral instruction is ensured at 5v ? 10%. the do pin indicates the ready/busy status of the device if cs is brought high after a minimum of 250 ns low (t csl ). the wral cycle takes 16 ms typical. figure 2-1: synchronous data timing cs clk di do (read) do (program) v ih v il v ih v il v ih v il v oh v ol v oh v ol t css t dis t sv t csh t ckl t ckh t dih t pd t pd t cz t cz status valid downloaded from: http:///
93aa46/56/66 ds20067k-page 8 ? 1998-2012 microchip technology inc. figure 2-2: read timing figure 2-3: ewen timing figure 2-4: ewds timing t csl cs clk di do tri-state 1 10 a n a0 0dx d0dx d0 dx d0 t csl 1 1 0 cs clk di 01 x x t csl 1 0 0 cs clk di 0 0 x x downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 9 93aa46/56/66 figure 2-5: write timing figure 2-6: wral timing figure 2-7: erase timing 11 0 a n a0 cs clk di do t csl d0 dx tri-state twc busy ready ensured at vcc = +4.5v to +6.0v. 1 x 0 cs clk di do t csl d0 dx tri-state twl busy ready standby 0 0 x tri-state 1 an-1 1 cs clk di t csl a0 an-2 standby 1 do tri-state t wc busy ready an check status tri-state t sv t cz downloaded from: http:///
93aa46/56/66 ds20067k-page 10 ? 1998-2012 microchip technology inc. figure 2-8: eral timing ensured at vcc = +4.5v to +6.0v. 1 0 cs clk di do t csl tri-state t ec busy ready standby 0 tri-state check status 10 t cz t sv downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 11 93aa46/56/66 3.0 pin description table 3-1: pin function table 3.1 chip select (cs) a high level selects the device. a low level deselects the device and forces it into standby mode. however, a programming cycle which is already initiated and/or in progress will be completed, regardless of the cs input signal. if cs is brought low during a program cycle, the device will go into standby mode as soon as the programming cycle is completed. cs must be low for 250 ns minimum (t csl ) between consecutive instructions. if cs is low, the internal control logic is held in a reset status. 3.2 serial clock (clk) the serial clock is used to synchronize the communi- cation between a master device and the 93aaxx. opcode, address, and data bits are clocked in on the positive edge of clk. data bits are also clocked out on the positive edge of clk. clk can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to clock high time (t ckh ) and clock low time (t ckl ). this gives the controlling master freedom in preparing opcode, address and data. clk is a don't care if cs is low (device deselected). if cs is high, but start condition has not been detected, any number of clock cycles can be received by the device without changing its status (i.e., waiting for start condition). clk cycles are not required during the self-timed write (i.e., auto erase/write) cycle. after detection of a start condition the specified number of clock cycles (respectively low-to-high transitions of clk) must be provided. these clock cycles are required to clock in all required opcode, address and data bits before an instruction is executed (see instruc- tion set truth table). clk and di then become don't care inputs waiting for a new start condition to be detected. 3.3 data in (di) data in is used to clock in a start bit, opcode, address and data synchronously with the clk input. 3.4 data out (do) data out is used in the read mode to output data synchronously with the clk input (t pd after the positive edge of clk). this pin also provides ready/busy status information during erase and write cycles. ready/busy status infor- mation is available on the do pin if cs is brought high after being low for minimum chip select low time (t csl ) and an erase or write operation has been initiated. the status signal is not available on do, if cs is held low or high during the entire write or erase cycle. in all other cases do is in the high-z mode. if status is checked after the write/erase cycle, a pull-up resistor on do is required to read the ready signal. 3.5 organization (org) when org is connected to v cc , the (x16) memory organization is selected. when org is tied to v ss , the (x8) memory organization is selected. org can only be floated for clock speeds of 1mhz or less for the (x16) memory organization. for clock speeds greater than 1 mhz, org must be tied to v cc or v ss . name function cs chip select clk serial data clock di serial data input do serial data output v ss ground org memory configuration nu not utilized v cc power supply note: cs must go low between consecutive instructions. downloaded from: http:///
93aa46/56/66 ds20067k-page 12 ? 1998-2012 microchip technology inc. 4.0 packaging information 4.1 package marking information xxxxxnnn 8-lead pdip xxxxxxxx yyww 017 example 93aa46 0410 8-lead soic (.150) xxxxxxxx xxxxyyww nnn example 93aa46 /sn0410 017 8-lead soic (.208) xxxxxxxx xxxxxxxx yywwnnn example 93aa46x /sm 0310017 downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 13 93aa46/56/66 8-lead plastic dual in-line (p) ? 300 mil body (pdip) b1 b a1 a l a2 p ? e eb ? c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top ? 51 01 5 51 01 5 mold draft angle bottom ? 51 01 5 51 01 5 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shal l not exceed jedec equivalent: ms-001 drawing no. c04-018 .010 (0.254mm) per side. significant characteristic note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
93aa46/56/66 ds20067k-page 14 ? 1998-2012 microchip technology inc. 8-lead plastic small outline (sn) ? narrow, 150 mil body (soic) foot angle ? 048048 15 12 0 15 12 0 ? mold draft angle bottom 15 12 0 15 12 0 ? mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l ? c 45 ? ? a2 ? a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic note: for the most current package drawings, please see the microchip packaging specif ication located at http://www.microchip.com/packaging downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 15 93aa46/56/66 8-lead plastic small outline (sm) ? medium, 208 mil body (soij) (jeita/eiaj standard, formerly called soic) foot angle 048 048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.43 0.36 .020 .017 .014 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.64 0.51 .030 .025 .020 l foot length 5.33 5.21 5.13 .210 .205 .202 d overall length 5.38 5.28 5.11 .212 .208 .201 e1 molded package width 8.26 7.95 7.62 .325 .313 .300 e overall width 0.25 0.13 0.05 .010 .005 .002 a1 standoff 1.98 .078 a2 molded package thickness 2.03 .080 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units a2 a a1 l c 21 d n p b e e1 .070 .075 .069 .074 1.781.75 1.971.88 eceed .010" (0.254mm) per side. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not notes: drawing no. c04-056 *controlling parameter note: for the most current package drawings, please see the microchip packaging specif ication located at http://www.microchip.com/packaging downloaded from: http:///
93aa46/56/66 ds20067k-page 16 ? 1998-2012 microchip technology inc. appendix a: revision history revision j added note to page 1 header (not recommended for new designs). added section 4.0: package marking information. added on-line support page. updated document format. revision k added a note to each package outline drawing. downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 17 93aa46/56/66 the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: product support C data sheets and errata, application notes and sample programs, design resources, users guides and hardware support documents, latest software releases and archived software general technical support C frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing business of microchip C product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchips customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under support, click on customer change notification and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: distributor or representative local sales office field application engineer (fae) technical support customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://microchip.com/support downloaded from: http:///
93aa46/56/66 ds20067k-page 18 ? 1998-2012 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip product. if you wish to provide your comments on organization, clarity, subject matter, and ways in whic h our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this docume nt. to: technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds20067k 93aa46/56/66 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you think would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document? downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 19 pic18fxxxx product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . sales and support part no. x /xx xxx pattern package temperature range device device 93aa46/56/66: microwire serial eeprom 93aa46/56/66x: microwire serial eeprom in alternate pinouts (sn package only) 93aa46t/56t/66t: microwire serial eeprom (tape and reel) 93aa46xt/56xt/66xt: microwire serial eeprom (tape and reel) temperature range blank = 0 ? c to +70 ? c package p = plastic pdip (300 mil body), 8-lead sn = plastic soic (150 mil body), 8-lead sm = plastic soic (208 mil body), 8-lead (93aa46/56/66) data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. downloaded from: http:///
pic18fxxxx ds20067k-page 20 ? 1998-2012 microchip technology inc. notes: downloaded from: http:///
? 1998-2012 microchip technology inc. ds20067k-page 21 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mtp, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. analog-for-the-digital age, app lication maestro, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, sqi, serial quad i/o, total endurance, tsharc, uniwindriver, wiperlock, zena and z-scale are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. gestic and ulpp are registered trademarks of microchip technology germany ii gmbh & co. & kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 1998-2012, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 9781620767320 note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchips code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory an d analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 == downloaded from: http:///
ds20067k-page 22 ? 1998-2012 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - hangzhou tel: 86-571-2819-3187 fax: 86-571-2819-3189 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - osaka tel: 81-66-152-7160 fax: 81-66-152-9310 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-5778-366 fax: 886-3-5770-955 taiwan - kaohsiung tel: 886-7-213-7828 fax: 886-7-330-9305 taiwan - taipei tel: 886-2-2508-8600 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 worldwide sales and service 10/26/12 downloaded from: http:///

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